課程概述：
This course contains the introductory part of combinational logic along with the clear concepts of Karnaugh maps. It also introduces sequential networks with flip flops and finite state machine (FSM). During this course we also learn how to use Verilog hardware description language (HDL) to design a digital system. Students will learn practical HDL design techniques for digital systems using electronic design automation (EDA).
目標：
1.Digital system design using hardware description language (HDL).
2.Simulation and testing of digital systems.
3.Programming and verification of digital systems.